downloaded by vinve fu of olivetti on thursday, 19 september, 2002 10:22:42 pm PM5355 s/uni-622 errata pmc-950217 issue 7 suni-622 datasheet errata pmc-sierra, inc 105-8555 baxter place, burnab y , bc canada v5a 4v7 604 415 6000 PM5355 s/uni-622 datasheet errata issue 7: march, 1998
downloaded by vinve fu of olivetti on thursday, 19 september, 2002 10:22:42 pm PM5355 s/uni-622 errata pmc-950217 issue 7 suni-622 datasheet errata ______________________________________________________________________________________________ i table of contents 1. issue 7 errata........................................................................................ 1 2. timing parameter changes .............................................................. 1 2.1. minimum prop delays for lais, lop, & prdi page 221...................... 1 2.2. tgfc and tcp parameters page 233.................................................. 2 3. register changes ................................................................................ 2 3.1. register 0x2c page 105 ................................................................... 2 4. pin description changes................................................................... 4 4.1. pin 74 tfp page 13......................................................................... 4 4.2. pin 68 tcp page 27 ......................................................................... 4 4.3. pin 62 tgfc page 27 ....................................................................... 4 5. clarification of operation.............................................................. 6 5.1. tca may de-assert early.................................................................. 6 5.2. cells can be retransmitted .............................................................. 6 5.3. s1 (z1) byte synchronization message ............................................ 6 5.4. rx fifo must not be gapped during last two words of a cell ..... 6 5.5 page 188: changes to bit error rate monitor settings.................... 6 5.6 page 149: sts-3c application information for the fiforst bit. ..... 7 6. contacting pmc-sierra...................................................................... 8
downloaded by vinve fu of olivetti on thursday, 19 september, 2002 10:22:42 pm PM5355 s/uni-622 errata pmc-950217 issue 7 suni-622 datasheet errata ______________________________________________________________________________________________ 1 1. issue 7 errata this issue 7 contains errata applied to the pmc-941027 issue 2 datasheet. the issue 2 datasheet and issue 7 errata supersede all prior editions and versions. a change bar indicates a section that has been revised. 2. timing parameter changes 2.1. minimum prop delays for lais, lop, & prdi page 221 specification of the minimum propagation delays for lais, lop, and prdi have been removed. receive alarm output (fig. 42) symbol description min max units t p groclk piclk high to groclk edge 3 25 ns t p oof piclk high to oof valid 3 30 ns t p lof piclk high to lof valid 3 30 ns t p los piclk high to los valid 3 30 ns t p lais piclk high to lais valid 3 30 ns t p lrdi piclk high to lrdi valid 3 30 ns t p lop groclk low to lop valid 3 25 ns t p pais groclk low to pais valid 3 25 ns p prdi groclk low to prdi valid 3 25 ns t p lcd groclk low to lcd valid 3 25 ns
downloaded by vinve fu of olivetti on thursday, 19 september, 2002 10:22:42 pm PM5355 s/uni-622 errata pmc-950217 issue 7 suni-622 datasheet errata ______________________________________________________________________________________________ 2 2.2. tgfc and tcp parameters page 233 specification of all parameters for tgfc and tcp are removed. transmit gfc access (fig. 48) symbol description min max units t p tcp gtoc lk low to tcp valid 3 20 ns ts tgfc tgfc set-up time to gtoclk 5 ns th tgfc tgfc hold time to gtoclk 1 ns 3. register changes 3.1. register 0x2c page 105 this register is not supported. register 0x2c: sstb expected clock synchronization message bit type function default bit 7 r/w ez1[7] 0 bit 6 r/w ez1[6] 0 bit 5 r/w ez1[5] 0 bit 4 r/w ez1[4] 0 bit 3 r/w ez1[3] 0 bit 2 r/w ez1[2] 0 bit 1 r/w ez1[1] 0 bit 0 r/w ez1[0] 0 this register contains the expected clock synchronization message byte (z1) in the receive stream.
downloaded by vinve fu of olivetti on thursday, 19 september, 2002 10:22:42 pm PM5355 s/uni-622 errata pmc-950217 issue 7 suni-622 datasheet errata ______________________________________________________________________________________________ 3 ez1[7:0]: the ez1[7] - ez1[0] bits contain the expected clock synchronization message byte (z1). ez1[7:0] is compared with the clock synchronization message byte extracted from the receive stream. a clock synchronization message byte mismatch (csmm) is declared if the accepted clock synchronization message byte differs from the expected clock synchronization message byte. if enabled, an interrupt is asserted upon declaration and removal of csmm.
downloaded by vinve fu of olivetti on thursday, 19 september, 2002 10:22:42 pm PM5355 s/uni-622 errata pmc-950217 issue 7 suni-622 datasheet errata ______________________________________________________________________________________________ 4 4. pin description changes 4.1. pin 74 tfp page 13 tfp input 74 the active high transmit frame pulse (tfp) signal is used to align the sonet/sdh transport frame generated by the s/uni-622 device to a system reference. tfp should be brought high for a single gtoclk period every 810 (sts-1), 2430 (sts-3c), 2430 (sts-12c) gtoclk cycles, or a multiple thereof. tfp may must be tied low if such synchronization is not required. the offset between a pulse applied to the tfp input and the resultant fpout pulse is 18 tclk periods in sts-1 mode, 26 tclk periods in sts-3c mode and 81 tclk periods in sts-12c mode. tfp is sampled on the rising edge of gtoclk. 4.2. pin 68 tcp page 27 tcp reserved output 68 the transmit cell pulse (tcp) signal is provided to locate the most significant gfc bit (gfc[3]) of a cell's gfc field sourced on input tgfc. tcp pulses high for one gtoclk period to identify the gtoclk cycle before the cycle the gfc[3] bit is output on tgfc. tcp is updated on the falling edge of gtoclk. this pin is reserved. 4.3. pin 62 tgfc page 27 tgfc reserved input 62 the transmit generic flow control (tgfc) input contains gfc bits that can be inserted into the gfc fields of transmitted cells (including idle/unassigned cells). insertion is controlled using bits in the tacp fixed stuff/gfc register. tgfc is sampled on the rising edge of gtoclk. this pin is reserved and must be tied to gnd for proper operation of the s/uni-622
downloaded by vinve fu of olivetti on thursday, 19 september, 2002 10:22:42 pm PM5355 s/uni-622 errata pmc-950217 issue 7 suni-622 datasheet errata ______________________________________________________________________________________________ 5 5. clarification of operation 5.1. tca may de-assert early the tca signal may de-assert incorrectly. to avoid this problem the fiforst bit in register 0x60 tacp control/status should be asserted after power-up or a hardware reset. a transmit fiforst should be issued each time the tsoc changes boundaries. these boundary changes are identified by the tsoci bit (bit 6 of the same register). 5.2. cells can be retransmitted it has been found that a glitch on tfclk may cause the s/uni-622 to transmit previously transmitted cells. if this situation arises it can be cleared with a txfifo reset. 5.3. s1 (z1) byte synchronization message the current gr-253-core (5.4.7.1) requires the byte validation to be done over 8 frames, instead of 5 frames as is done in the s/uni-622. this, however, is still useful to be included, since it relieves the microprocessor from polling reg. 0x0e, the receive s1 (z1) register every frame to validate the synchronization message. 5.4. rx fifo must not be gapped during last two words of a cell do not de-assert rrdenb during the second to last word (or byte) of a cell. it has been found that the removal of rrdenb during the second to last word (or byte) of a cell will result in the loss of the last word (or byte). 5.5 page 188: changes to bit error rate monitor settings the recommended register settings for sts-1 mode should be as follows: ber reg. 0x72 reg. 0x73 reg. 0x74 reg. 0x75 10-4 a0 00 4f 00 10-5 b0 04 3e 00 10-6 e0 2e 3e 00
downloaded by vinve fu of olivetti on thursday, 19 september, 2002 10:22:42 pm PM5355 s/uni-622 errata pmc-950217 issue 7 suni-622 datasheet errata ______________________________________________________________________________________________ 6 the recommended register settings for sts-3c mode should be as follows: ber reg. 0x72 reg. 0x73 reg. 0x74 reg. 0x75 10-4 34 00 4d 00 10-5 90 01 3e 00 10-6 a0 0f 3e 00 10-7 40 9c 3e 00 the recommended register settings for sts-12c mode should be as follows: ber reg. 0x72 reg. 0x73 reg. 0x74 reg. 0x75 10-4 20 00 cc 00 10-5 64 00 3e 00 10-6 e8 03 3e 00 10-7 10 27 3e 00 5.6 page 149: sts-3c application information for the fiforst bit. in sts-3c mode of operation, the fiforst bit in register 0x60: tacp control/status initializes the transmit fifo. for correction operation, a fiforst should be issues at the end of each initialization cycle (ie. at the end of the reset routine). a transmit fiforst should also be issued each time tsoc changes boundaries. boundary changes are identified by tsoci (bit 6). the fiforst should be asserted for a minimum of 3.5us. (one cell period at 155mbps).
downloaded by vinve fu of olivetti on thursday, 19 september, 2002 10:22:42 pm PM5355 s/uni-622 errata pmc-950217 issue 7 suni-622 datasheet errata ______________________________________________________________________________________________ 7 6. contacting pmc-sierra pmc-sierra, inc. 105-8555 baxter place burnaby, b.c. canada v5a 4v7 tel: 604-415-6000 fax: 604-415-6206 product information: info@pmc-sierra.bc.ca applications information: apps@pmc-sierra.bc.ca world wide web: http://www.pmc-sierra.com printed in canada seller will have no obligation or liability in respect of defects or damage caused by unauthorized use, mis-use, accident, external cause, installation error, or normal wear and tear. there are no warranties, representations or guarantees of any kind, either express or implied by law or custom, regarding the product or its performance, including those regarding quality, merchantability, fitness for purpose, condition, design, title, infringement of third- party rights, or conformance with sample. seller shall not be responsible for any loss or damage of whatever nature resulting from the use of, or reliance upon, the information contained in this document. in no event will seller be liable to buyer or to any other party for loss of profits, loss of savings, or punitive, exemplary, incidental, consequential or special damages, even if seller has knowledge of the possibility of such potential loss or damage and even if caused by sellers negligence. ? 1998 pmc-sierra, inc. pmc-950217r7 ref pmc-941027r2 issue date: march, 1998.
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